All the models developed as a part of this research followed the guideline presented above; incremental model development. All the device models in VHDL-AMS were initially modeled to represent piece-wise linear characteristics. These models were then validated for functional correctness by incorporating them in appropriate test circuits. Later a few properties, such as non-linearities and geometrical and parametric dependencies, were incorporated to improve the performance and accuracy of the models. Here we present only those later stages of device models in VHDL-AMS that are functionally equivalent to the device models implemented in SPICE. In this chapter we discuss the issues related to the implementation of the SPICE equivalent models in VHDL-AMS. The source code for these VHDL-AMS models and the test-circuits is presented in Appendix B, however the essential characteristic equations representing the device models in VHDL-AMS are presented here. For the corresponding SPICE decks please refer to [23]. A few of the SPICE models have to undergo minor modifications to be represented in VHDL-AMS. These modifications are made in order to aid convergence and also improve performance, without noticeably sacrificing the accuracy of the model. We also validate these VHDL-AMS models using SEAMS and compare the results(plots) with those of SPICE. The SPICE resluts are assumed to be accurate.