Simulation is about building and exercising the model of a system that is being designed. One of the key objectives of the simulation is to verify the functional correctness of the system. In the electrical domain, simulation is a means of validating an electronic circuit, whether a digital circuit, an analog circuit or both. By digital circuits we refer to those circuits that use discrete logic levels('0','1','X',etc.) for all the data manipulations. By analog circuits we refer to those circuits that make use of the properties of continuous-time electrical components such as resistors and capacitors to describe the behavior of a circuit. The advancements in VLSI design technology have caused current systems to be a combination of both analog and digital sub-systems, rather than being isolated digital and analog systems. This development has led to the creation of a new type of simulators, namely, mixed-signal simulators. This thesis focuses on analog simulation as an essential component of mixed-signal simulation.
Simulation is one of the essential Computer-Aided-Design(CAD) tools used in the Electronic Design Automation(EDA) industry today, to achieve a wide variety of goals, quickly and efficiently. To achieve these goals, the process of simulation requires three sets of data and a program:
To exploit the expressiveness of a language and to evaluate the performance of a simulator, it is necessary to build appropriate models and suitable test-benches. This has been a key factor that motivated the origination of this thesis, which represents the semiconductor device models in VHDL-AMS. Simulation, in this thesis, is chosen as a means to validate these models as it is one of the easiest and the most appropriate techniques practiced today to validate a model. Models created in VHDL-AMS are validated using a mixed-signal simulator, SEAMS
[2].