Lecture 28--Some other computational models--the VLSI model; the quantum model. 12/3/97

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The VLSI Model. The VLSI model was defined by Thompson, Brent, Kung, and others in the 1980's to aid in the design and analysis of algorithms being implemented on VLSI chips. A VLSI chip is essentially a two- dimensional object, with circuit elements built by adding layers of different materials, making specific patterns in each layer. For example, there might be two layers of aluminum, each of which can be used for making wires. The two layers are insulated from each other, except where cuts or "vias" allow them to be in contact. One way to arrange the wires in a chip is to have a set of horizontal wires in one layer and a set of vertical wires in the other. A path from one point to another in the chip must then be formed by connecting or breaking wires in this grid (Figure N1).

In a VLSI chip, everything is essentially planar. In addition, wires have a width as well as a length and so take up area. The two important parameters for a VLSI designer are speed and area. Area is limited, of course. In addition, larger chips tend to have more defects, and so are more expensive to make. A third parameter which is important is the number of input/output (I/O) pins which can fit around the boundary of a chip. In general, if a chip has area N then its boundary will be "capital theta"(n^1/2). The model is typically defined as follows:

1. The chip is a convex region R of the plane.

2. A wire has a minimal width l > 0.

3. At most u (> 2) wires can intersect at any point in R.

4. Each I/O port lies on the boundary of R and contains area > l².

5. A bit requires time at least t to propagate through an I/O port or gate. The time to propagate along a wire is proportional to the length of the wire.

6. Storage for one bit takes area at least l².

7. Each input or output bit appears at a fixed time and a fixed I/O port. Each input bit is input only once.

Some consequences of this definition:

If we are inputting two n-bit numbers from registers, with 2n I/O ports, to an adder, for exmple, it will take area n² and time n to deliver the bits to their proper positions (Figure N2).

It can be proved that if we lay out a complete binary tree with all its leaves on the border and if the tree has n nodes, then the area required is at least "capital theta"(nlog₂n).

If we do not require that the leaves be on the border, the layout can be done in area "capital theta"(n) (H-tree, Figure N3).

We can get upper and lower bounds on the area and time to solve problems. For example, it can be shown that addition of two n-bit numbers can be done in time "capital theta"(log₂n).

Typically, bounds are given for: area A--the anount of information present at any one time instant Area-time AT--the volume of the "area-time" cube area-time-squared AT<2sup>2--the square root of the area represents the amount of information that can pass from one side of the chip to the other at any given time--see Figure N4.

For example, it can be shown for multiplication of two n-bit integers that AT² = "capital omega"(n). However, there is no practical multiplier which can meet this bound.

28.2. Quantum computation. Another model of computaion, which models circuit elements which are just beginning to be feasible, is the quantum model. This model was first discussed, by Feynman, Deutsch, and others, about 1980. The idea is that the states 0 and 1 will be represented by orthogonal quantum states of a two-level quantum system (e.g., "ground" and "excited"). These states are typically called "qubits". If two qubits q1 and q2 interact then they can change state due to the interaction. Superposition implies that many computations can be carried out simultaneously.

Several practical problems in realizing such a computer exist. For example,

1. How do we get a system to represent these states?

2. How do we prevent the states from losing coherence?

3. How do we take measurements without disturbing the states?

Currently efforts at MIT and other places are resulting in some progress in this area.

One fairly obvious consequence of using quantum computation is that all gates must be "time-reversible". For example, an AND gate is not time reversible since there is no way to recover the inputs by observing the outputs. Some gates which are reversible are the INVERTER and a gate whose inputs are a,b and whose outputs are (a EXOR b) and b.

Now the important thing about a "quantum computer state" for computation theory is that it is essentially a probability distribution, containing information about many different possibilities at the same time. This idea leads to some interesting computaional abilities. One such problem is "Deutsch's problem".

This is a problem in cryptography. Suppose Alice, in Amsterdam, selects a number between 0 and 2L -1 and mails it to Bob in Boston. Bob applies a function f to x and sends Alice the result, f(x). Now Bob's function f had certain properties. For all x between 0 and 2L-1, f(x) is either 0 or 1. furthermore, f is either a constant function or has the value 0 for exactly half the x's and 1 for the other half. Alice must determine which kind of function Bob is using. she can certainly do this by sending more than half the x values and looking at what Bob sends back. But can she do it more efficiently?

Well, in the quantum computing world, the answer is yes. Alice sends to Bob ALL values simultaneously and Bob replies with all f(x) values. Using seperposition, Alice can now repeat the transition with a phase shift of the original data. When Bob replies the second time, she can use the two replies to extract the f values and find out which type of function f Bob was using.